Some microcomputers are so constructed that, when no event is processed for a predetermined period of time, the operation of the clock control circuit is discontinued to thereby discontinue the operation of the CPU. Thus, the CPU, too, is shifted to a low power consumption mode. Once having been shifted to the low power consumption mode, the operation of the clock control circuit is resumed at a time point when an event to be processed occurs, and the CPU starts.
The above clock control circuit is often constructed to execute digital oscillation operation by utilizing, for example, a ring oscillator and a digital PLL, enabling a clock frequency to be set. In the thus constructed clock control circuit, the period of reference clock signals produced by an oscillator is measured based on the clock signals of the ring oscillator having a very high frequency, and the frequency of the reference clock signals is multiplied to obtain clock signals of a predetermined frequency.
Therefore, if the operation of the clock control circuit is discontinued after being shifted to the low power consumption mode, the measured data of the period of the reference clock signals on which the clock signals are based, is reset. Therefore, to start again the CPU after the low power consumption mode is reset, the start sequence is commenced after waiting for the oscillator to be stabilized and after measuring the period of the reference clock signals. The time required for the measurement accounts for a delay in starting the CPU again.
For this reason, JP-A-6-203183 proposes to feed clock signals to a microcomputer from an external unit that does not require the time for stabilizing the oscillation, and immediately resets the ultra-low power consumption mode when a signal requesting the reset of the STOP mode is generated.
In some microcomputers, a control program is stored in a rewritable nonvolatile memory such as a flash ROM to facilitate the development of a control program. In order to read and write the data, further, the flash ROM needs a voltage level different from the power source voltage of a general logic circuit and, hence, needs a dedicated power source circuit. It is however a prerequisite to feed clock signals from an external unit, which, therefore, will become quite useless if it is not allowed to employ the above prerequisite due to the system construction.
Further, when the microcomputer is shifted to the low power consumption mode, the control program is not read out and, hence, no electric power is fed to the flash ROM. Therefore, when the CPU is restarted by resetting the low power consumption mode, the CPU is not accessible until the power source circuit for the flash ROM is started to form a power source voltage necessary for the reading operation. Accordingly, the time required for starting the power source circuit in the flash ROM, too, is a factor of delaying the restart of the CPU.